Saleae Driver



Saleae Logic16
Statussupported
Source codesaleae-logic16
Channels3/6/9/16
Samplerate100/50/32/16MHz
Samplerate (state)
Triggersnone (SW-only)
Min/max voltage-0.9V — 6V
Threshold voltageconfigurable:
for 1.8V to 3.6V systems: VIH=1.4V, VIL=0.7V
for 5V systems: VIH=3.6V, VIL=1.4V
Memorynone
Compressionyes
Websitesaleae.com
Linux

Saleae makes high-performance, dead-simple-to-use USB Logic Analyzers that can record both digital and analog, and decode protocols like SPI, I2C, Serial, 1-Wire, CAN, Manchester, I2S and more. Saleae makes high-performance, dead-simple-to-use USB Logic Analyzers that can record both digital and analog, and decode protocols like SPI, I2C, Serial, 1-Wire, CAN, Manchester, I2S and more. A quick overview of the cheap clone of Saleae USB logic analyzer 24 MHz 8 ch. The overview includes explanation about the software (Sigrok) and the hardware. Sigrok is an opensource set of tools to deal with tools such as oscilloscope and logic analyzers from different vendors. Saleae logic analyzer 24 mhz 8 ch kanal kurulum driver test setup. The Saleae Logic16 is a USB-based, 16-channel logic analyzer with 100/50/32/16MHz sampling rate (at 3/6/9/16 enabled channels). The case requires a Torx T5 screwdriver to open. See Saleae Logic16/Info for more details (such as lsusb -v output) about the device. See Saleae Logic for the predecessor product of the Saleae Logic16.

The Saleae Logic16 is a USB-based, 16-channel logic analyzer with 100/50/32/16MHz sampling rate (at 3/6/9/16 enabled channels).

The case requires a Torx T5 screwdriver to open.

See Saleae Logic16/Info for more details (such as lsusb -v output) about the device.

See Saleae Logic for the predecessor product of the Saleae Logic16.

  • 3Firmware

Hardware

  • FPGA: Xilinx Spartan-3A XC3S200A, 200K gates (datasheeet)
  • USB interface chip: Cypress CY7C68013A-56PVXC (FX2LP) (datasheet)
  • Ultralow capacitance ESD protection: 4x ST DVIULC6-4SC6 (datasheet)
  • 2Kbit I2C EEPROM: Microchip 24AA02 (datasheet) (marking: 'B2TH', starts with 'B2' always, the last 2 characters are a 'traceability code')
  • 2.5MHz, 1.5A synchronous step down switching regulator (1.2V): Semtech SC189 (datasheet) (marking: '189C')
  • 2.5MHz, 1.5A synchronous step down switching regulator (3.3V): Semtech SC189 (datasheet) (marking: '189Z')
  • N-MOSFET: 2x 2N7002 type MOSFET (marking: '72Y7'). Connected as 'low-side' switch/LED driver and inverter.
Driver

Pinouts and connections:

JTAG header (FPGA):

The J3 pin header is a JTAG connector wired to the FPGA. The pins are (from left to right, the right-most pin, pin number 1, is square):

54321
GND TMS TCK TDO TDI

Testpoints:

T1T2T3
1.2V 3.3V GND (FX2)

Cypress FX2:

(FPGA 15, IO_L05P_3) PD5 1- O -56 PD4 (FPGA 12, IO_L04P_3)
(FPGA 13, IO_L04N_3) PD6 2- -55 PD3 (FPGA 44, IO_L09N_2)
(FPGA 10, IO_L03N_3) PD7 3- -54 PD2 (FPGA 5, IO_L02P_3)
GND 4- -53 PD1 (FPGA 4, IO_L01N_3)
(FPGA 90, IO_0) CLKOUT 5- -52 PD0 (FPGA 6, IO_L02N_3)
VCC 6- -51 *WAKEUP (3.3V)
GND 7- -50 VCC
(FPGA 3, IO_L01P_3) RDY0/*SLRD 8- -49 RESET# (3.3V via D2 (diode?))
(FPGA 16, IO_L05N_3) RDY1/*SLWR 9- -48 GND
AVCC 10- -47 PA7 (FPGA 9, IO_L03P_3)
(24MHz crystal) XTALOUT 11- -46 PA6 (FPGA 30, IO_L04P_2)
(24MHz crystal) XTALIN 12- -45 PA5 (FPGA 85, IO_L03P_0)
AGND 13- -44 PA4 (FPGA 98, IO_L06P_0)
AVCC 14- -43 PA3 (FPGA 51, MISO)
(USB D+) DPLUS 15- -42 PA2 (FPGA 53, CCLK)
(USB D-) DMINUS 16- -41 PA1 (FPGA 48, INIT_B)
AGND 17- -40 PA0 (FPGA 54, DONE)
VCC 18- -39 VCC
GND 19- -38 CTL2 (FPGA 100, PROG_B)
(FPGA 84, IO_L02N_0) *IFCLK 20- -37 CTL1 (FPGA 97, IP_0)
RESERVED 21- -36 CTL0 (FPGA 94, IO_L05N_0)
(EEPROM SCL) SCL 22- -35 GND
(EEPROM SDA) SDA 23- -34 VCC
VCC 24- -33 GND
(FPGA 40, IO_L08P_2) PB0 25- -32 PB7 (FPGA 93, IO_L05P_0)
(FPGA 78, IO_L01N_0) PB1 26- -31 PB6 (FPGA 37, IO_L07N_2)
(FPGA 77, IO_L01P_0) PB2 27- -30 PB5 (FPGA 41, IO_L08N_2)
(FPGA 49, IO_L10N_2) PB3 28- -29 PB4 (FPGA 46, MOSI)

Other FPGA connections:

Saleae driver
28CH052CH8
29CH156CH9
32CH257CH10
33CH360CH11
34CH461CH12
36CH562CH13
43CH664CH14
50CH765CH15
73LED (active low)

Photos

  • Device, front

  • Device, bottom

  • PCB, top

  • PCB, bottom

  • Xilinx XC3S200A

  • Cypress FX2LP

  • I2C EEPROM

  • ST DVIULC6-4SC6

  • Voltage regulators

  • N-MOSFETs

Firmware

Firmware and FPGA bitstream usage

You can use the sigrok-fwextract-saleae-logic16 tool to extract (from the 'Logic' Linux binary) the FX2 firmware and the FPGA bitstreams required for using the Saleae Logic16:

Copy these files to the directory where your libsigrok installation expects them (usually /usr/local/share/sigrok-firmware) and they will be found and used automatically by the libsigrok saleae-logic16 driver.

The script has been tested to work with the Saleae vendor software version 1.2.10. More recent versions might not be supported currently (see bug #989). Old Saleae vendor software versions can be downloaded from support.saleae.com.

Technical firmware details

The firmware for the FX2LP is embedded in the vendor application as a set of Intel HEX lines. Each line is uploaded individually with a separate control transfer. The firmware currently occupies the address range [0x0000-0x145d], but is uploaded out of order.

Device

See Saleae Logic16/Firmware for more details on the vendor firmware.

Protocol

Sample format:

The samples (as received via USB) for the enabled probes (3, 6, 9, or 16) are organized as follows:

In the above example, 3 probes are enabled. For each probe there are 2 bytes / 16 bits (e.g. 0xLL 0xLL for probe 0), then the next probe's data is received (0xMM 0xMM for probe 1), then 0xNN 0xNN for probe 2. When 2 bytes have been received for all enabled probes, the process restarts with probe 0 again.

The 16 bits of data per probe seem to contain the pin state of the respective probe (1: high, 0: low) at 16 different sampling points/times (which ones depends on the samplerate).

Configuration:

Saleae Llc Driver

Endpoint 1 is used for configuration of the analyzer. The transfers are 'encrypted' using a simple series of additions and XORs. Two kinds of transfers are used; a 3 byte out transfer starting with 0x81 followed by a 1 byte in transfer, and a 4 byte out transfer starting with 0x80. It's quite plausible that these provide raw read/write access to memory locations.

Channel number configuration
3 channels0x80 0x01 0x02 0x070x80 0x01 0x03 0x00
6 channels0x80 0x01 0x02 0x3f0x80 0x01 0x03 0x00
9 channels0x80 0x01 0x02 0xff0x80 0x01 0x03 0x01
16 channels0x80 0x01 0x02 0xff0x80 0x01 0x03 0xff
Sampling frequency
500kHz0x80 0x01 0x0a 0x000x80 0x01 0x04 0xc7
1MHz0x80 0x01 0x0a 0x000x80 0x01 0x04 0x63
2MHz0x80 0x01 0x0a 0x000x80 0x01 0x04 0x31
4MHz0x80 0x01 0x0a 0x000x80 0x01 0x04 0x18
5MHz0x80 0x01 0x0a 0x000x80 0x01 0x04 0x13
8MHz0x80 0x01 0x0a 0x010x80 0x01 0x04 0x13
10MHz0x80 0x01 0x0a 0x000x80 0x01 0x04 0x09
12.5MHz0x80 0x01 0x0a 0x000x80 0x01 0x04 0x07
16MHz0x80 0x01 0x0a 0x010x80 0x01 0x04 0x09
25MHz0x80 0x01 0x0a 0x000x80 0x01 0x04 0x03
32MHz0x80 0x01 0x0a 0x010x80 0x01 0x04 0x04
40MHz0x80 0x01 0x0a 0x010x80 0x01 0x04 0x03
50MHz0x80 0x01 0x0a 0x000x80 0x01 0x04 0x01
80MHz0x80 0x01 0x0a 0x010x80 0x01 0x04 0x01
100MHz0x80 0x01 0x0a 0x000x80 0x01 0x04 0x00

Resources

Saleae Driver Linux

  • Vendor software (current release)
Retrieved from 'https://sigrok.org/w/index.php?title=Saleae_Logic16&oldid=14192'

I bought a cheap ($18 shipped) logic analyser from China (via AliExpress) which recently arrived in the post. It’s a clone of the $150 Saleae Logic Analyser. Here it is:

Saleae Device Driver

And here are its insides:

A rather grubby looking board. I also noticed a couple of small solder balls which could have been shorting out a couple of the pins of the main IC, the Cypress CY7C68013A, so I removed them. Having done some research on the Saleae Logic, the components didn’t come as much surprise. The CY7C68013A is an 8051 microprocessor with a USB transceiver bolted on. Logic states are read via an 8 bit wide IO port and sent back over USB to the software. The maximum claimed sample rate is 24Mhz.

The only difference to the Saleae Logic is the addition of an HC245, an ‘Octal 3-State Noninverting Bus Transceiver’, on the back of the board. This was probably added to try and protect the inputs of the CY7C68013A from overvoltage, but it’s ability to do so is questionable. Still, for all intents and purposes, this clone should function exactly the same as a real Saleae Logic.

Note the 2Kb (256 byte) EEPROM on the bottom right of the final photo. This contains configuration data for the CY7C68013A, in particular the VID/PID combination. The VID is a 16-bit vendor number (Vendor ID) and the PID is a 16-bit product number (Product ID). This allows the product to be identified as a ‘Saleae USB Logic Analyzer’, instead of a generic CY7C68013A device. Also, note that the EEPROM contains no firmware – the firmware is loaded over USB on startup of the logic analyser software. This make the board itself very generic – the only thing that separates this device from many others on the market is the 4 byte VID/PID! More on this later…

Saleae Logic 8 Driver

I installed the Saleae Logic software, plugged in the clone and it was recognised instantly. It seemed to work! Next, I decided to test its accuracy. I programmed a PIC to output a periodic signal as fast as possible (the chip was clocked at 8MHz):

I measured the output with the logic analyser first – it showed a high time of 500ns and a low time of 1500 nanoseconds. Next I measured the signal with an oscilloscope and measured it to be exactly the same (to my eye!). So, the accuracy certainly seems reasonable up to at least 500kHz. (I should have tested at a higher speed, but didn’t have anything faster to hand).

Another product on the market, the USBee, uses exactly the same hardware. I was aware of other clones which allowed you to select, via jumper, impersonating either a Saleae or USBee, so I wanted to see if I could do this myself.

The procedure boils down to modifying the VID/PID contained in the EEPROM mentioned earlier. The software, e.g. Saleae Logic looks for the right VID/PID of the hardware. If it finds the right VID/PID, it uploads the firmware and starts working. The same can be said for the USBee software, albeit with a different VID/PID. Now, the obvious way to change the VID/PID contained in the EEPROM in order to fake a USBee is to desolder the EEPROM, reprogram it and solder it back, but there’s a better way.

Some googling quickly led to this article, explaining how to read the EEPROM contents using the CY7C68013A (which the EEPROM is of course connected to). So, I downloaded the Cypress EZ-USB development kit (cy3684_ez_usb_fx2lp_development_kit_15.exe) which contained the tools to allow this.

Here’s my step by step guide for doing it with Win7 x64 (note that steps 2 and 5 can be ignored on Win XP. Infact, if you have an XP box available, it’s easier to do it on that).

  1. Uninstall the Saleae Logic Driver, using Device Manager.
  2. We want to install the generic cyusb.sys Cypress driver which will allow us to send commands to the device using CyConsole. If you’re using Win XP, goto step 3. Else, download Cypress Suite USB (CySuiteUSB_3_4_7_B204.exe) which contains the Win7 x64 driver.
  3. Locate the appropriate cyusb driver. For Win 7 x64, this is: C:CypressCypress Suite USB 3.4.7Driverbinwlhx64. For Win XP, we can use the older version of the driver, found in the Dev Kit package, here: C:CypressUSBDriversCyUsb.
  4. Open cyusb.inf. This must be modified to contain the VID/PID of our clone (which is also the VID/PID of the Saleae Logic), so that Windows will accept and install the driver CyUSB. So, replace all instances of USBVID_XXXX&PID_XXXX with USBVID_0925&PID_3881 (note that the VID/PID of the device can be found in device manager). Also, make sure to uncomment (remove the semi-colon) the lines looking like this: “%VID_0925&PID_3881.DeviceDesc%=CyUsb, USBVID_0925&PID_3881″.
  5. If you’re Running Windows 7 (and also Vista, I think), you’ll need to force Windows to accept installing unsigned kernel drivers. To do so, restart your computer and press F8 during the boot process, as you do to start in safe-mode. However, instead of selecting safe-mode from the boot menu, select ‘Disable Driver Signature Enforcement’. Note that this is temporary – the driver won’t remained installed after a reboot. This is fine for our purposes.
  6. Install the CyUSB driver.
  7. Start CyConsole.
  8. Select ‘EZ-USB Interface’ from the Options menu.
  9. Press the ‘Download’ button. This allows us to upload our own firmware.
  10. Select the file C:CypressUSBExamplesFX2LPVend_axVend_Ax.hex. You should see the firmware being uploaded and the 8051 will be reset.
  11. Let’s first read our current EEPROM contents:
    • Enter ’0xA2′ into the ‘Req’ box next to the ‘Vend Req’ button.
    • Set ‘Length’ to 8
    • Make sure ‘Dir’ is set to ’1 IN’
    • Now click ‘Vend Req’. You should see 8 bytes of Hex codes starting with ‘C0′. My device read out: ‘C0 25 09 81 38 1B 00 00′. Note the VID (09 25) and PID (38 81) are stored in little-endian format. C0 is required by the Cypress chip. I am unsure what 1B is for.
  12. Now let’s program the VID/PID of the USBee ZX into our EEPROM:
    • Enter the bytes ’C0 A9 08 05 00 84 23 00′ into the ‘Hex Bytes’ field.
    • Now change the ‘Dir’ box to ’0 OUT’
    • Click ‘Vend Req’. The bytes written will be echoed back to the console.
  13. That’s it! Make sure your have the USBee Suite installed along with the ZX test pod. Pull out the device, plug it back in and it should be recognised by USBee as the ZX model.

So, while not as easy as switching a few jumpers, the device can be made to look like a USBee ZX without too much effort. I believe that the USBee driver is just a signed version of the CyUSB driver, which means that the device is recognised by CyConsole (as opposed to the Saleae driver, which seems to be modified such that the device doesn’t show up in CyConsole, hence the rigmarole of installing CyUSB above). This means that changing back to Saleae Logic is as simple as following steps 7 to 12, but programming with our original bytes ‘C0 25 09 81 38 1B 00 00′.

Saleae Driver Updater

If you’re constantly switching between firmwares, a better idea may be to remove the EEPROM and solder an 8 DIP socket in it’s place. By cutting a hole in the back of the case, the EEPROM could then easily be changed.